Circuit for measuring absolute spread in capacitors implemented in planary technology

ABSTRACT

A circuit for measuring absolute spread in capacitors implemented in planary technology. A charge pump supplying a charge current to an internal capacitor (Cint) is used, the voltage across the internal capacitor (Cint) being coupled through a comparator for comparing the voltage with first and second threshold levels. A bistable multivibrator reverses the direction of the charge current, to charge the internal capacitor (Cint) when the voltage decreases below the second threshold level, and to decharge the internal capacitor (Cint) when the voltage increases above the first threshold level. The charge current is determined by a reference voltage that is provided across an external resistor (Rext), the first and second threshold levels defining a voltage range being proportional to the reference voltage. An output signal of the bistable multivibrator is coupled to frequency measuring means to compare the repetition frequency thereof with a reference frequency.

The invention relates to a circuit for measuring absolute spread incapacitors implemented in planary technology. Planary technologies areto be understood to include integrated circuit (IC−), thick film, thinfilm and printed circuit board technologies. Such measuring circuits areon themselves known. An example thereof implemented in IC technology ise.g. disclosed in UK Patent Application GB 2 184 621.

The component values of circuit elements implemented in planarytechnology and in particular in integrated circuit (IC) technology areknown to have absolute and relative spread. Absolute spread isunderstood to be the spread in the actual component values from a wantedaverage value, whereas relative spread is understood to be the spread inthe component values relative to each other. Absolute spread is mainlycaused by variation of the thickness or the composition of planarlayers, whereas relative spread is caused by the inhomogenities alongthe X and Y axes of the planar layers. In practice the absolute spreadin the component values of elements of a circuit implemented in planarytechnology, hereinafter indicated as “planary implemented circuit”, ismuch larger than the relative spread in the component values of saidelements.

The above known circuit is used for self-calibration of capacitances fora binarily weighted array of capacitances and provides for aninterrupted measurement of the absolute spread. This feature excludesthe application of the circuit for functions which require continuousoperation, because during the calibration phase the array ofcapacitances has to be disconnected from the rest of the circuit. Thisin particular rules out the known circuit from being used in e.g.receivers.

It is an object of the present invention to provide a continuous andreliable measurement of absolute spread of integrated capacitors.

A circuit for measuring absolute spread in capacitors implemented inplanary technology according to the invention is therefore characterisedin that it comprises a charge pump supplying a charge current to aninternal capacitor (Cint), the voltage across the internal capacitor(Cint) being coupled through a comparator for comparing said voltagewith first and second threshold levels to a bistable multivibrator forreversing the direction of the charge current to charge the internalcapacitor (Cint) when said voltage decreases below the second thresholdlevel and to decharge the internal capacitor (Cint), when said voltageincreases above the first threshold level, a reference voltagedetermining the charge current, as well as the voltage range betweensaid first and second threshold levels, an output signal of the bistablemultivibrator being coupled to frequency measuring means to compare therepetition frequency thereof with a reference frequency.

The invention is based on the recognition that due to the small relativespread of elements within a planary implemented circuit, a reliableindication for the absolute spread of any and all elements within suchcircuit is obtained by measuring the actual deviation of the value ofonly one element thereof from a precision reference value.

By applying the above measure of the invention, an internal capacitor(Cint) is being measured by using this capacitor as integrating elementin an oscillator configuration. For a given Cint, the frequency of thisoscillator is defined by the voltage range between the first and secondthreshold levels on the one hand and the charge/decharge current of theinternal capacitor (Cint) on the other hand. By having both voltagerange and charge/decharge current depend on the same, by internalcircuit elements defined parameter, i.e. said reference voltage, theoscillation frequency of the circuit becomes independent from saidparameter and varies only with the internal capacitor (Cint) and theexternal resistor (Rext). The less spread in the external resistor(Rext), the more accurate the oscillation frequency will vary with theabsolute spread of the internal capacitor (Cint) only. Preferably a highprecision resistor is used for the external resistor (Rext). To derive ameasure for the absolute spread of the internal capacitor (Cint) fromthe oscillating frequency, frequency measuring means are used to comparethe repetition frequency of the oscillating frequency with a referencefrequency. Preferably a high precision crystal oscillator is used togenerate the reference frequency.

A preferred embodiment of circuit according to the invention ischaracterised in that said voltage range is proportional to thereference voltage. This allows for a proper matching of circuitelements, therewith increasing the accuracy of the measurement.

Preferably such circuit is characterised in that the charge current isgenerated by the reference voltage being provided across an externalresistor Rext. A discrete resistor can now be used, such discreteresistor normally having much less spread than planary implementedresistors. This allows to further increase the accury of themeasurement.

Preferably such circuit is characterised by a monotonous variation ofthe voltage across said internal capacitor in the range between firstand second threshold levels being defined by the quotient of thereference voltage and the internal capacitor (Cint), said range beingdefined by the magnitude of the reference voltage and said chargecurrent being defined by the quotient of the reference voltage and theexternal resistor (Rext). This measure allows for proper elementmatching resulting in an immunity of the oscillation frequency fromparameters, which are defined by internal elements. Another preferredembodiment of a circuit according to the invention is characterised bysaid internal capacitor (Cint) being coupled between emitters of firstand second transistors, the collectors and the bases thereof beingcoupled through mutually equal load resistors to a first supply voltage,said collectors being coupled to inputs of a negative feedback circuitfor a negative feedback of the collector output voltage of said firstand second transistors to the base inputs thereof, the emitters of saidfirst and second transistors being coupled to first and second outputsof said charge pump.

The invention will be described in greater detail with reference toFigures shown be way of example in the drawing.

In this drawing it is shown in:

FIG. 1 a functional block diagram of the circuit for measuring absolutespread in capacitors implemented in planary technology according to theinvention;

FIG. 2 a signal plot showing the voltage across the internal ICcapacitor in the circuit of FIG. 1;

FIG. 3 a circuit diagram of a preferred embodiment of the circuitaccording to the invention.

FIG. 1 shows a circuit for measuring absolute spread in capacitorsimplemented in planary technology, hereinafter also referred to asplanary implemented circuit, comprising a charge pump CP including firstand second current sources CS1 and CS2 respectively, for supplyingalternately charge and decharge currents of equal magnitude in mutuallyopposite direction to an internal capacitor (Cint) via a terminal tl1,the charge pump CP being provided with a controlled switching device Sfor alternately coupling the first and the second current source CS1 andCS2, respectively, through a mass connection across the internalcapacitor Cint. The voltage across the internal capacitor (Cint) at theterminal tl1, hereinafter referred to as capacitor voltage Vcap, isbeing coupled to first and second threshold circuits TC1 and TC2 of acomparator COM for comparing said voltage with first and secondthreshold levels Vt1 and Vt2, respectively. In the circuit shown thefirst and second threshold levels Vt1 and Vt2 are chosen at +Vref and−Vref, respectively. Outputs of the first and second threshold circuitsTC1 and TC2 are coupled to set and reset inputs SI and RI of a bistablemultivibrator BM, respectively. An output of the bistable multivibratorBM is coupled to a control input of the switching device S.

The operation of the planary implemented circuit will be described inmore detail with reference to FIG. 2, showing respectively in curve athe time dependent variation of the capacitor voltage Vcap and in curveb the binary output signal of the bistable multivibrator BM beingsupplied as switching control signal to the controlled switching deviceS.

In a first state of the controlled switching device S the first currentsource CS1 is coupled to the internal capacitor (Cint), supplyingthereto a charge current I. This causes the capacitor voltage Vcap toincrease with a slope dVcap/dt being determined by I/Cint, i.e. thequotient of charge current I and the capacitance of the internalcapacitor (Cint). The increase of the capacitor voltage Vcap continuesuntil first threshold level Vt1=+Vref is reached, e.g. at t1. At thatmoment t1 the first threshold circuit TC1 supplies a setsignal to theset input SI of the bistable multivibrator BM, upon which the bistablemultivibrator BM switches over from a first stable state into a secondstable state causing its binary output signal to change from a firstvalue into a second value, e.g. from 0 to 1. As a result thereof theswitching device S changes over from the first state into a secondstate, in which the first current source CS1 is disconnected from theinternal capacitor Cint and in which now the second current source CS2is coupled thereto. The second current source CS2 is supplying dechargecurrent −I to the internal capacitor Cint, causing the capacitor voltageVcap to decrease with a slope dVcap/dt being determined by −I/Cint fromthe first threshold level Vt1 to the second threshold level Vt2=−Vref.When at moment t2 the capacitor voltage Vcap reaches the secondthreshold level Vt2, then the second threshold circuits TC2 of thecomparator COM supplies a reset signal to the reset input RI of thebistable multivibrator BM, upon which the bistable multivibrator BMswitches over from its second stable state into its first stable statecausing its binary output signal to change over from the second valueinto the first value, e.g. from 1 to 0. The switching device S therewithresumes its first state, in which the first current source CS1 is againcoupled to the internal capacitor Cint, whereas now the second currentsource CS2 is being disconnected therefrom. By deriving the magnitude ofthe charge/decharge currents and the range between the first and secondthreshold levels Vt1 and Vt2 in accordance with the invention, from thesame parameter, the spread in this parameter has no influence whatsoeveron the time period between t1 and t2, i.e. the time necessary for thecapacitor voltage Vcap to increase from the second threshold level Vt2to the first threshold level Vt1, or vice versa, hereinafter also beingreferred to as time constant tc. According to the invention themagnitude of the charge/decharge currents as well as the first andsecond threshold levels Vt1 and Vt2 are being derived from a referencevoltage Vref supplied by circuitry being part of the planary implementedcircuit. The charge/decharge currents I are being derived from Vref byapplying Vref across an external resistor Rext (not shown). This allowsto use a discrete resistor for Rext, which are commonly available withmuch less absolute spread than resistors implemented in planarytechnology. As a result thereof said timeconstant tc mainly depends onthe spread in the internal capacitor Cint, the more so if a precisionresistor is used for Rext. The spread in the internal capacitor Cint istherewith reflected in the spread of the oscillating frequency of thecircuit, i.e. the repetition frequency of the binary output signal b ofthe bistable multivibrator BM. This repetition frequency is measured infrequency measuring means FM being coupled to the output of the bistablemultivibrator BM, by comparing the same with a reference frequencysupplied by a crystal oscillator XO. The frequency measuring means FMsupplies at an output FMO thereof a signal presenting the spread in theinternal capacitor Cint. FIG. 3 shows a circuitdiagram of a preferredembodiment of a circuit for measuring absolute spread in capacitorsimplemented in planary technology according to the invention, comprisingsaid internal capacitor (Cint) being coupled between emitters of firstand second transistors T1 and T2, the collectors and the bases of T1 andT2 being coupled through mutually equal load resistors R to a firstsupply voltage Vs. The emitters of T1 and T2 are being coupled to firstand second outputs of a charge pump. The collectors of T1 and T2 arebeing coupled to inputs of a negative feedback circuit for a negativefeedback of the collector output voltage of T1 and T2 to their baseinputs thereof.

The negative feedback circuit also includes third and fourth transistorsT3 and T4 having bases coupled to the collectors of said first andsecond transistors T1 and T2, respectively. The collectors of T3 and T4are coupled to the supply voltage Vs and the emitters thereof throughmutually equal resistors R2 to a second supply voltage, or mass. Theemitters of T3 and T4 are respectively coupled to bases of fifth andsixth emitter coupled transistors T5 and T6 respectively, the collectorsof T5 and T6 being cross coupled to the bases of the second and firsttransistors T1 and T2. The emitters of T5 and T6 are commonly coupled toa third output of the charge pump.

The charge pump comprises a pair of emitter coupled seventh and eighthtransistors T7 and T8, respectively, the collectors thereof constitutingrespectively said first and second outputs of the charge pump, the basesthereof being mutually coupled to a reference voltage Vref, and theemitters thereof being coupled through an external resistor (Rext) tomass. The charge pump also comprises a ninth transistor T9, thecollector thereof constituting said third output of the charge pump, thebase thereof being coupled to the reference voltage Vref and the emitterthereof being coupled to an emitter resistor R to mass. The referencevoltage Vref is derived from a serial connection of a resistor Rx with anumber of (e.g. 2) diodes D1 and D2 coupled between the supply voltageVs and mass and available at the common connection of the resistor Rxwith the diode D1.

The circuit shown in this FIG. 3 provides the functions of the circuitof FIG. 1 and includes the derivation of the reference voltage Vref aswell. In this circuit all elements with exception of Rext and thefrequency measuring means FM are being implemented in planary technologyon one and the same physical unit, e.g. monolithically integrated in onechip, implemented in thick or thin film technology on one film or inprinted circuit board technology on one board. This allows for accurateelement matching, due to the small relative spread in the componentvalues of the elements within the circuit. Therefore the use of mutuallyidentical elements in the implementation of the various functions isoptimised. The transistors T1-T9 are mutually identical. Also theresistors R are mutually identical, as are the resistors R2 andrespectively the resistors R3. The matching obtained by the use ofmutually identical transistors T1-T9 and resistors causes the voltagedrop across the external resistor Rext and the emitter resistor of T9 tobe mutually substantially equal, this voltage drop being hereinafterreferred to as Vref. The charge pump output currents I at the collectorsof T7 and T8 are therewith mutually equal and are being substantiallydetermined by Vref and the external resistor Rext, I=Vref/(2*Rext). Rextis chosen substantially equal to R. The threshold levels Vt1 and Vt2defining the switching moments of the bistable multivibrator, aredetermined by the voltage across the resistors R connected to the basesof T1 and T2 respectively, this voltage being also equal to Vref. Therange between the threshold levels Vt1 and Vt2 therewith corresponds to2*Vref.

Starting from a first state of the pair of first and second transistorsT1 and T2, in which T1 is in a conducting mode, whereas T2 is in ablocking mode, the collector current of T7 is bypassed through T1 to thesupply voltage Vs, whereas the collector current of T8 charges theinternal capacitor (Cint). This causes the capacitor voltage Vcap (thevoltage at the emitter of T1 with regard to the voltage at the emitterof T2) to increase with a slope dVcap/dt being equal to I/Cint. Theincrease of the capacitor voltage Vcap is reversed into a decrease whenit reaches a magnitude equal to Vref. At that moment T2 starts toconduct and by the negative feedback through T3-T6, T1 is blocked,therewith bringing the pair of first and second transistors T1 and T2 ina second state, in which the current supply to the internal capacitor(Cint) is reversed with regard to the situation in the first state. Thiscauses the capacitor voltage Vcap to decrease until a value of −Vref isreached, whereupon T1 starts again to conduct, forcing T2 through thenegative feedback into the blocking mode.

Now with dVcap/dt=I/Cint, I=Vref/(2*Rext) and the time period betweentwo consecutive switching actions, i.e. the above time constant tc,being defined by 2*Vref/tc=dVcap/dt, it can easily be demonstrated that1/tc=1/(4*Rext.Cint).

With f being equal to 1/(2*tc) it means that f=1/(8*Rext.Cint) onlyvaries with the spread in Rext and Cint and is not influenced by thespread in Vref.

A further improvement of the already accurate measuring of the elementspread can be obtained by the use of stabilisation means for stabilisingthe emitter voltage of the ninth transistor T9 (not shown).

A circuit for measuring absolute spread in capacitors implemented inplanary technology according to the invention should be readilyunderstood from the foregoing description. It should be apparent thatvarious changes may be made in the present invention as shown by way ofexample in the drawing of FIGS. 1 and 3, without departing from thespirit and scope of the invention.

What is claimed is:
 1. A circuit for measuring absolute spread incapacitors implemented in planary technology comprising: a charge pumpthat is configured to supply a charge current to an internal capacitor(Cint), a voltage across the internal capacitor (Cint) being coupledthrough a comparator for comparing said voltage with first and secondthreshold levels to a bistable multivibrator for reversing the directionof the charge current: to charge the internal capacitor (Cint) when saidvoltage decreases below the second threshold level and to decharge theinternal capacitor (Cint), when said voltage increases above the firstthreshold level, wherein the charge current, as well as a voltage rangebetween said first and second threshold levels, is dependent upon areference voltage, and an output signal of the bistable multivibrator iscoupled to a frequency measuring device that is configured to compare arepetition frequency of the output signal with a reference frequency. 2.The circuit of claim 1, wherein said voltage range is proportional tothe reference voltage.
 3. The circuit of claim 2, wherein said internalcapacitor (Cint) is coupled between emitters of first and secondtransistors, collectors and bases of the first and second transistorsbeing coupled through mutually equal load resistors to a first supplyvoltage, said collectors being coupled to inputs of a negative feedbackcircuit for a negative feedback of output voltages of the collectors ofsaid first and second transistors to the base inputs thereof, theemitters of said first and second transistors being coupled to first andsecond outputs of said charge pump.
 4. The circuit of claim 1, whereinthe charge current is generated by the reference voltage being providedacross an external resistor Rext.
 5. The circuit of claim 4, whereinsaid internal capacitor (Cint) is coupled between emitters of first andsecond transistors, collectors and bases of the first and secondtransistors being coupled through mutually equal load resistors to afirst supply voltage, said collectors being coupled to inputs of anegative feedback circuit for a negative feedback of output voltages ofthe collectors of said first and second transistors to the base inputsthereof, the emitters of said first and second transistors being coupledto first and second outputs of said charge pump.
 6. The circuit of claim5, wherein a monotonous variation of the voltage across said internalcapacitor in the range between first and second threshold levelscorresponds to a quotient of the reference voltage and the internalcapacitor (Cint), said range is dependent upon a magnitude of thereference voltage and said charge current is dependent upon a quotientof the reference voltage and the external resistor (Rext).
 7. Thecircuit of claim 5, wherein the negative feedback circuit comprisesthird and fourth transistors having bases coupled to the collectors ofsaid first and second transistors, collectors coupled to the supplyvoltage and emitters coupled through mutually equal resistors to asecond supply voltage as well as to bases of fifth and sixth emittercoupled transistors, collectors of the fifth and sixth emitter coupledtransistors being cross coupled to the bases of the second and firsttransistors, and emitters of the fifth and sixth emitter coupledtransistors being commonly coupled to a third output of the charge pump.8. The circuit of claim 7, wherein the charge pump comprises a pair ofemitter coupled seventh and eighth transistors, collectors of theseventh and eighth transistors providing respectively said first andsecond outputs of the charge pump, bases of the seventh and eighthtransistors being mutually coupled to the reference voltage and emittersof the seventh and eighth transistors being coupled through saidexternal resistor (Rext) to the second supply voltage, as well as aninth transistor having: a collector that provides said third output ofthe charge pump, a base that is coupled to said reference voltage and anemitter that is coupled via an emitter resistor to the second supplyvoltage.
 9. The circuit of claim 8, further including a stabilizer thatis configured to stabilize the emitter voltage of the ninth transistor.10. The circuit of claim 9, wherein a monotonous variation of thevoltage across said internal capacitor in the range between first andsecond threshold levels corresponds to a quotient of the referencevoltage and the internal capacitor (Cint), said range is dependent upona magnitude of the reference voltage and said charge current isdependent upon a quotient of the reference voltage and the externalresistor (Rext).
 11. The circuit of claim 10, wherein said frequencymeasuring means comprises a clock controlled microprocessor that isconfigured to measure the repetition frequency of the bistablemultivibrator output signal.
 12. The circuit of claim 1, wherein saidinternal capacitor (Cint) is coupled between emitters of first andsecond transistors, collectors and bases of the first and secondtransistors being coupled through mutually equal load resistors to afirst supply voltage, said collectors being coupled to inputs of anegative feedback circuit for a negative feedback of output voltages ofthe collectors of said first and second transistors to the base inputsthereof, the emitters of said first and second transistors being coupledto first and second outputs of said charge pump.
 13. The circuit ofclaim 12, wherein a monotonous variation of the voltage across saidinternal capacitor in the range between first and second thresholdlevels corresponds to a quotient of the reference voltage and theinternal capacitor (Cint), said range is dependent upon a magnitude ofthe reference voltage and said charge current is dependent upon aquotient of the reference voltage and an external resistor (Rext). 14.The circuit of claim 12, wherein the negative feedback circuit comprisesthird and fourth transistors having bases coupled to the collectors ofsaid first and second transistors, collectors coupled to the supplyvoltage and emitters coupled through mutually equal resistors to asecond supply voltage as well as to bases of fifth and sixth emittercoupled transistors, collectors of the fifth and sixth emitter coupledtransistors being cross coupled to the bases of the second and firsttransistors, and emitters of the fifth and sixth emitter coupledtransistors being commonly coupled to a third output of the charge pump.15. The circuit of claim 14, wherein the charge pump comprises a pair ofemitter coupled seventh and eighth transistors, collectors of theseventh and eighth transistors providing respectively said first andsecond outputs of the charge pump, bases of the seventh and eighthtransistors being mutually coupled to the reference voltage and emittersof the seventh and eighth transistors being coupled through an externalresistor (Rext) to the second supply voltage, as well as a ninthtransistor having: a collector that provides said third output of thecharge pump, a base that is coupled to said reference voltage and anemitter that is coupled via an emitter resistor to the second supplyvoltage.
 16. The circuit of claim 15, wherein a monotonous variation ofthe voltage across said internal capacitor in the range between firstand second threshold levels corresponds to a quotient of the referencevoltage and the internal capacitor (Cint), said range is dependent upona magnitude of the reference voltage and said charge current isdependent upon a quotient of the reference voltage and the externalresistor (Rext).
 17. The circuit of claim 1, wherein a monotonousvariation of the voltage across said internal capacitor in the rangebetween first and second threshold levels corresponds to a quotient ofthe reference voltage and the internal capacitor (Cint), said range isdependent upon a magnitude of the reference voltage and said chargecurrent is dependent upon a quotient of the reference voltage and anexternal resistor (Rext).
 18. The circuit of claim 1, wherein saidfrequency measuring means comprises a clock controlled microprocessorthat is configured to measure the repetition frequency of the bistablemultivibrator output signal.
 19. A method of measuring an absolutespread in capacitance of a capacitor, comprising: applying a chargecurrent to the capacitor to provide thereby a capacitor voltage,comparing the capacitor voltage to a first threshold level and a secondthreshold level, reversing the charge current when the capacitor voltagerises to the first threshold level, thereby discharging the capacitor,and reversing the charge current when the capacitor voltage falls to thesecond threshold level, thereby charging the capacitor, and measuring afrequency of reversals of the charge current.
 20. The method of claim19, further including providing a reference voltage, controlling thecharge current based on the reference voltage, and determining the firstthreshold level and the second threshold level based on the referencevoltage.